1. Field of the Invention
The present invention generally relates to a signal transmitting method, a transmitting apparatus, and a receiving apparatus used for the signal transmitting method.
2. Description of the Related Art
In a case of reducing the number of lines of data communications paths between plural circuits, one known method is to reduce the lines by multiplexing signals in the time direction. The following example describes a case of converting plural analog signals output from a high frequency circuit part of a wireless apparatus into digital signals and transferring the digital signals to a digital circuit part of the wireless apparatus.
In order to achieve high speed transfer, recent wireless apparatuses convert analog signals output from plural antennas or plural reception circuits into digital signals and simultaneously transfer the digital signals to a below-described digital circuit part. However, the number of digital signal lines required by this method of transferring digital signals is equivalent to “number of bits”×“number of A/D converters” (number of channels). Further, along with the increase of the A/D converting rate, the signal frequency flowing in the signal lines is becoming higher year by year. Currently, the maximum signal frequency of the signal lines is approximately 100 MHz. Therefore, the required transmission capability between the A/D conversion circuit and the below-described signal processing circuit can be expressed as (number of bits)×(number of A/D converters)×(sample frequency [bits/second]).
FIGS. 1A and 1B are block diagrams illustrating an example of a signal transfer system according to a related art example. In a high frequency circuit part 11 illustrated in FIGS. 1A and 1B, analog signals of four channels are encoded with a frequency of 100 MHz, converted into digital signals (50 MHz) of 9 bits, and transferred to a digital circuit part 12. In transferring the digital signals to the digital circuit part 12, 9 bits of the digital data may be transferred in parallel or 9 bits of the digital data may be multiplexed and transferred to the digital circuit part 12. In this case, the required transmission capability is 9×4×100=3600 Mbps.
As illustrated in FIG. 1A, in a parallel transfer type signal transfer system where a strobe of 1 bit and a clock of 1 bit (100 MHz) are transferred together by using a signal line of 9 bits, the operation frequency per single signal line is 200 MHz (50 MHz×4).
As illustrated in FIG. 1B, in a serial transfer type signal transfer system where a strobe of 1 bit and a clock of 1 bit (100 MHz) are transferred together by using a signal of 1 bit, the operation frequency per single signal line is 1.8 GHz (50 MHz×4×9). In the case of FIGS. 1A and 1B, the total communications power is 1800×α mW when the power of the buffer amp provided in each signal line is α mW/MHz.
In Japanese Laid-Open Patent Application No. 11-312952, input analog signals are A/D converted and successively stored in a two-system register group. Then, the output of each register group is selectively input to an XOR logic circuit, to thereby calculate the exclusive OR (XOR) between each bit of digital data and spreading codes. Then, the output of the XOR logic circuit is added by an analog adder.
In communications using spreading signals, even in a case where signals spread by using different codes exist in the same communication path, the signals can be separated and decoded by using corresponding spreading signals. In a case of combining the maximum frequency (F) of signals to be transmitted and the number of lines (N) to be multiplexed, the spreading frequency (L) is expressed as L=F×N. In the example illustrated in FIGS. 1A and 1B, since the maximum frequency F is 50 MHz and the number of lines N is 36 (9×4), the spreading frequency L is 1800 MHz (50×36). This results in high power consumption equivalent to 1800×α mW.